Transistor and Gate Sizing — Study Resources & PYQs
Circuit level transistor and gate sizing
- Estimated study time: 50 minutes
Study resources
- COURSE MATERIAL: LOW POWER VLSI CIRCUITS AND SYSTEMS — full PDF (transistor/gate sizing sections) (PDF) — COURSE MATERIAL: LOW POWER VLSI CIRCUITS AND SYSTEMS — full PDF (transistor/gate sizing sections) — selected for the syllabus topic Transistor and Gate Sizing.
- NPTEL Low Power VLSI Circuits & Systems, IIT Kharagpur (Article) — NPTEL course covering MOS transistors, MOS inverters, static/dynamic CMOS, MOS memories, switching/dynamic/leakage power, voltage scaling and low-power logic.
Taught in these subjects
- Digital VLSI Techniques — ECT-1701 · Government College of Engineering and Technology, Jammu