DRAM — Study Resources & PYQs
Dynamic RAM (DRAM) design
- Estimated study time: 100 minutes
Study resources
- VLSI Circuit Design → Domino Logic — eLearning @ AISAT (SRAM 6T cell, DRAM 3T/1T cell section) (PDF) — VLSI Circuit Design → Domino Logic — eLearning @ AISAT (SRAM 6T cell, DRAM 3T/1T cell section) — selected for the syllabus topic DRAM.
- NPTEL Low Power VLSI Circuits & Systems, IIT Kharagpur (Article) — NPTEL course covering MOS transistors, MOS inverters, static/dynamic CMOS, MOS memories, switching/dynamic/leakage power, voltage scaling and low-power logic.
Taught in these subjects
- Digital VLSI Techniques — ECT-1701 · Government College of Engineering and Technology, Jammu