Complementary Pass Logic (CPL) — Study Resources & PYQs
Complementary pass transistor logic (CPL)
- Estimated study time: 84 minutes
Study resources
- CMOS Logic Structures — UNM ECE course notes (Transmission gate logic, CVSL section) (Article) — CMOS Logic Structures — UNM ECE course notes (Transmission gate logic, CVSL section) — selected for the syllabus topic Complementary Pass Logic (CPL).
- NPTEL Low Power VLSI Circuits & Systems, IIT Kharagpur (Article) — NPTEL course covering MOS transistors, MOS inverters, static/dynamic CMOS, MOS memories, switching/dynamic/leakage power, voltage scaling and low-power logic.
Taught in these subjects
- Digital VLSI Techniques — ECT-1701 · Government College of Engineering and Technology, Jammu