Limitations in I-V Model and MOSFET Parasitics — Study Resources & PY…
Limitations in the I-V model and MOSFET parasitics
- Estimated study time: 40 minutes
Study resources
- Performance evaluation of FD-SOI MOSFETs for different metal gate work function — arXiv (short channel effects, scaling limitations) (PDF) — Performance evaluation of FD-SOI MOSFETs for different metal gate work function — arXiv (short channel effects, scaling limitations) — selected for the syllabus topic Limitations in I-V Model and MOS…
- NPTEL Low Power VLSI Circuits & Systems, IIT Kharagpur (Article) — NPTEL course covering MOS transistors, MOS inverters, static/dynamic CMOS, MOS memories, switching/dynamic/leakage power, voltage scaling and low-power logic.
Taught in these subjects
- Digital VLSI Techniques — ECT-1701 · Government College of Engineering and Technology, Jammu