Basic Electronics Engineering 2018 Question Paper — Government Colleg…
The 2018 Basic Electronics Engineering previous year question paper (Government College of Engineering and Technology, Jammu), with every question and its marks.
- University: Government College of Engineering and Technology, Jammu
- Subject: Basic Electronics Engineering
- Course: Basic Electronics
- Branch: CIVIL ENGINEERING
- Year: 2018
- Paper: end-term
- Duration: 180 minutes
- Total marks: 100
Instructions
- Attempt five questions in all selecting at least two questions from each Section. Each question carries 20 marks.
Questions
Section - A
- Q1. (a) Explain with neat diagram, the working of full wave bridge rectifier and find: (i) $I_{dc}$ (ii) $V_{dc}$ (iii) $I_{rms}$ (iv) $V_{rms}$ (v) r.f. (vi) $\eta$ (vii) TUF (viii) $P_{dc}$ (ix) $P_{ac}$ (x) PIV (b) A $1K\Omega$ load is fed from $230\text{ V}$, $50\text{ Hz}$ supply using bridge rectifier. Calculate (i) $I_{dc}$ (ii) $V_{dc}$ (iii) ripple voltage (iv) Diode rating [20 marks]
- Q2. (a) Draw and explain LC filter with neat diagram. Show the value of ripple factor. (b) What is critical inductance in rectifiers and filters? Explain. Also explain the role of bleeder resister with neat diagram. [20 marks]
- Q3. (a) Explain with neat circuit diagram, the characteristics of transistor in C.E. Configuration. Draw its I/P & O/P characteristics and show the active, saturation and cut off region. Also write the expression for collector current in terms of I/P current and leakage current. (b) Derive for collecter to base bias circuit using transistor in terms of S, S' & S". [20 marks]
- Q4. For the circuit shown in Figure 1, the Si transistor has $\beta = 50$. Find: (a) Value of $R_B$ so that $I_C = 2\text{ mA}$ (b) Determine $V_{CE}$ when $I_C = 2\text{ ma}$. (c) Draw the operating point and load line and find $V_{CE}$ and $I_C$ on the graph. [20 marks]
Section - B
- Q5. (a) Draw and explain with neat diagram, the transformer coupled multistage amplifier show the frequency response. (b) Draw and explain the frequency response of multistage R .C. coupled amplifier. Show the effect of bypass capacitor and internal transistor capacitors effect on frequency response. [20 marks]
- Q6. (a) The transistor used has $h_{ie} = 600\Omega$, $h_{fc} = 55$. $R_C = 6\text{ k}\Omega$, $R_e = 1.5\text{ k}\Omega$, $C_C = 20\text{ }\mu\text{F}$, $R_s = 1\text{ k}\Omega$, calculate $C_e$ if $f_L = 50\text{ Hz}$. (b) Derive for frequency response and B. W due to effect of cascading in case of n - stage amplifier. [20 marks]
- Q7. (a) Express the following bit 2's complement form. (i) $+67$ (ii) $-736$ (iii) $-638$ (iv) $+428$ (v) $-990$ (b) Subtract the following using 1's complement: (i) $101 - 100$ (ii) $111 - 110$ (iii) $1011010 - 110001$ (iv) $101010101 - 10101010$ (v) $10110 - 1101$ [20 marks]
- Q8. (a) Implement the following Boolean function using $8:1$ multiplexer & $4:1$ multiplexer $F(A, B, C, D) = \sum m(0, 2, 6, 10, 11, 12, 13) + \sum d(3, 8, 14)$ (b) Simplify using Karnaugh map and implement using NOR Gates $F = \Pi M(1, 3, 5, 7, 8, 9, 10, 11, 12, 13, 14, 15)$ [20 marks]