Pseudo nMOS Gates — Study Resources & PYQs
Pseudo nMOS gates and their implementation.
- Estimated study time: 30 minutes
Study resources
- Pass Transistors and Transmission Gates (Article) — Covers pseudo-NMOS logic gates, a ratioed logic style that replaces the CMOS pull-up network with a single PMOS load.
- Ratioed, Pass Transistor and Dynamic Logic (Article) — Explains pseudo-NMOS gate design, where an always-on PMOS transistor acts as the pull-up load device.
Taught in these subjects
- Electronic Circuits-II — ECT1402 · Government College of Engineering and Technology, Jammu